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SHL             Shift Logical Left                   Flags: O D I T S Z A P C
                                                            * - - - * * ? * *
SHL destination,count

                    +----+   +---------------+
                    | CF |.--|  destination  |.-- 0
                    +----+   +---------------+

    SHL shifts the bits of the destination operand upward (toward the
    most significant bit) by the number of bit positions specified in
    the second operand (count). As bits are transferred out of the
    left (high-order) end of the destination, zero bits are shifted
    into the right (low-order) end. The carry flag (CF) is set equal
    to the last bit shifted out of the left end.

    The shift is repeated the number of times indicated by the second
    operand, which is either an immediate 8-bit value (max. 1 on the
    8086 processor) or the contents of the CL register. To reduce the
    maximum execution time, the 80186+ uses only the lower 5 bits of
    the count, limiting the count value to 31; the 8086 uses all 8
    bits of count.

    If the count operand is not an immediate 1, the overflow flag (OF)
    is undefined; otherwise SHL sets OF to 0 if destination's sign bit
    was not changed by the operation, to 1 if the sign bit was changed.


    SHL multiplies an unsigned integer by a power-of-two.

        Example:        shl   ax, 1     ; Shift left 1 bit
                        rcl   dx, 1     ; Propagate carry

    Note
    SHL is the same instruction as SAL (shift arithmetic left).


    Opcode      Format
    C0 /4 ib    SHL  r/m8,imm8
    C1 /4 ib    SHL  r/m16,imm8
    C1 /4 ib    SHL  r/m32,imm8
    D0 /4       SHL  r/m8,1
    D1 /4       SHL  r/m16,1
    D1 /4       SHL  r/m32,1
    D2 /4       SHL  r/m8,CL
    D3 /4       SHL  r/m16,CL
    D3 /4       SHL  r/m32,CL


    Length and timing
    Same as SAR