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      .title        'PROCESSOR INITIALIZATION'
      .def   RESET,INT0,INT1,INT2
      .def   TINT,RINT,XINT,USER
      .ref   ISR0,ISR1,ISR2
      .ref   TIME,RCV,XMT,PROC
*
* PROCESSOR INITIALIZATION
*   RESET AND INTERRUPT VECTOR SPECIFICATION
*     BRANCHES FOR EXTERNAL AND INTERNAL INTERRUPTS
*
      .sect "AORG0"
RESET B     INIT   ; RS- WILL BEGIN PROCESSING HERE.
*
INT0  B     ISR0   ; INT0- WILL BEGIN PROCESSING HERE.
INT1  B     ISR1   ; INT1- WILL BEGIN PROCESSING HERE.
INT2  B     ISR2   ; INT2- WILL BEGIN PROCESSING HERE.
*
      .sect "AORG1"
TINT  B     TIME        ; TIMER INTERRUPT PROCESSING.
RINT  B     RCV         ; SERIAL PORT RECEIVE PROCESSING.
XINT  B     XMT         ; SERIAL PORT TRANSMIT PROCESSING.
*
USER  B     PROC        ; TRAP VECTOR PROCESSING BEGINS.
*
*   THE BRANCH INSTRUCTION AT LOCATION 0 DIRECTS EXECUTION
*   TO BEGIN HERE FOR RESET PROCESSING TO INITIALIZE THE
*   PROCESSOR.    WHEN RESET IS APPLIED, THE FOLLOWING
*   CONDITIONS ARE ESTABLISHED FOR THE STATUS AND OTHER
*   INTERNAL REGISTERS.
*
*       ARP  OV  OVM    1 INTM          DP
*   ST0:  XXX     0   X 1   1 XXXXXXXXX
*
*       ARB  CNF TC  SXM  C   11  HM      FSM XF      FO  TXM  PM
*   ST1:  XXX     0   X 1   1 11   1       1   1       0   0       00
*
*   REGISTER   ADDRESS        DATA
*     DRR   >0000  XXXX XXXX XXXX XXXX
*     DXR   >0001  XXXX XXXX XXXX XXXX
*     TIM   >0002  1111 1111 1111 1111
*     PRD   >0003  1111 1111 1111 1111
*     IMR   >0004  1111 1111 11XX XXXX
*     GREG  >0005  1111 1111 0000 0000
*
*        RESERVED   XINT RINT TINT INT2 INT1 INT0
*   IMR:  1111111111    X    X        X    X    X      X
*
      ROVM              ; DISABLE OVERFLOW MODE.
      LDPK  0           ; POINT TO DATA MEMORY PAGE 0.
      LARP  7           ; POINT TO AUXILIARY REGISTER 7.
      LACK  03fh        ; LOAD ACCUMULATOR WITH >3F.
      SACL  4           ; ENABLE ALL INTERRUPTS VIA IMR.
*
*   INTERNAL DATA MEMORY INITIALIZATION.
*
      ZAC               ; ZERO THE ACCUMULATOR.
      LARK  AR7,060h    ; POINT TO BLOCK B2.
      RPTK  31
      SACL  *+          ; STORE ZERO IN ALL 32 LOCATIONS.
*
      LRLK  AR7,0200h   ; POINT TO BLOCK B0.
      RPTK  255
      SACL  *+          ; ZERO ALL OF PAGE 4.
      RPTK  255
      SACL  *+          ; ZERO ALL OF PAGE 5.
*
*                       ; POINT TO BLOCK B1.
      RPTK  255
      SACL  *+          ; ZERO ALL OF PAGE 6.
      RPTK  255
      SACL  *+          ; ZERO ALL OF PAGE 7.
*
*   THE PROCESSOR IS INITIALIZED.  THE REMAINING,
*   APPLICATION-DEPENDENT PART OF THE SYSTEM (BOTH ON- AND
*   OFF-CHIP) SHOULD NOW BE INITIALIZED.
*
      EINT              ; ENABLE ALL INTERRUPTS.