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IMUL            Multiplication, Signed               Flags: O D I T S Z A P C
                                                            * - - - ? ? ? ? *

    IMUL performs a signed multiplication. This instruction has 3
    variations:

    i)  One-operand form        IMUL source

        Logic   AX      . AL * source
             or
                DX:AX   . AX * source
             or
                EDX:EAX . EAX * source  ; 386+

        The source can be a byte, word, or doubleword located in
        memory or in a general register.


    ii) Two-operand form        IMUL oper1,oper2       CPU: 186+/386+

        Logic   oper1 . oper1 * oper2

        The first operand can be in any general register while the
        second operand can be an immediate value (80186+), or a value
        in memory or a general register (80386+). The product replaces
        the first operand.


    iii) Three-operand form     IMUL dest,oper1,oper2  CPU: 186+

        Logic   dest . oper1 * oper2

        The second operand (oper1) can be in any general register or a
        value in memory while the third operand (oper2) must be an
        immediate value. The product is stored in destination which
        can be any general register.


    Note
    An immediate value used with IMUL is automatically sign-extended
    to match the size of the general register operand.

    IMUL clears the carry and overflow flags (CF and OF) under these
    conditions:
    - form i     : if the upper half of the destination does not contain
                   any significant digits of the result
    - form ii,iii: if the result fits within the size of the destination
    (otherwise CF and OF are set to 1).


    Opcode      Format
    F6 /5       IMUL r/m8
    F7 /5       IMUL r/m16
    F7 /5       IMUL r/m32              ; 386+

    0F AF /r    IMUL r16,r/m16          ; 386+
    0F AF /r    IMUL r32,r/m32          ; 386+

    69 /r iw    IMUL r16,imm16          ; 186+
    69 /r iw    IMUL r16,r/m16,imm16    ; 186+
    69 /r id    IMUL r32,imm32          ; 386+
    69 /r id    IMUL r32,r/m32,imm32    ; 386+

    6B /r ib    IMUL r16,imm8           ; 186+
    6B /r ib    IMUL r16,r/m16,imm8     ; 186+
    6B /r ib    IMUL r32,imm8           ; 386+
    6B /r ib    IMUL r32,r/m32,imm8     ; 386+


    Length and timing

                        Accumulator multiplies
    Operands    Bytes   8088    186     286     386     486     Pentium
    r8           2      80-98    25-28  13      9-14    13-18   11   NP
    r16          2     128-154   34-37  21      9-22    13-26   11   NP
    r32          2       -        -      -      9-38    13-42   10   NP
    mem8     2+d(0-2)  86-104+EA 32-34  16     12-17    13-18   11   NP
    mem16    2+d(0-2) 134-160+EA 40-43  24     12-25    13-26   11   NP
    mem32    2+d(0-2)    -        -      -     12-41    13-42   10   NP

                        2 and 3 operand multiplies
    Operands        Bytes     186   286    386         486      Pentium
    r16, imm       2+i(1,2)    -    21  9-14/9-22  13-18/13-26  10   NP
    r32, imm       2+i(1,2)    -     -     9-38       13-42     10   NP
    r16,r16,imm    2+i(1,2)  22/29  21  9-14/9-22  13-18/13-26  10   NP
    r32,r32,imm    2+i(1,2)    -     -     9-38       13-42     10   NP
    r16,m16,imm    2+d(0-2)  25/32  24 12-17/12-25 13-18/13-26  10   NP
                    +i(1,2)
    r32,m32,imm    2+d(0-2)+i(1,2)   -    12-41       13-42     10   NP
    r16, r16       2+i(1,2)    -     -     9-22    13-18/13-26  10   NP
    r32, r32       2+i(1,2)    -     -     9-38       13-42     10   NP
    r16, m16       2+d(0-2)+i(1,2)   -    12-25    13-18/13-26  10   NP
    r32, m32       2+d(0-2)+i(1,2)   -    12-41       13-42     10   NP

    All forms: dest, src                        cycles for:   byte/word
               or                                             dword
               dest, src1, src2