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      The TMS320C25 has four features that can be used to handle overflow
      management. These include the branch on overflow conditions,
      accumulator saturation (overflow mode), product register right
      shift, and accumulator right shift. These faetures provide several
      options for overflow protection within an algorithm.

      A program can branch to an error handler routine on an overflow of
      the accumulator by using the BV (branch on overflow) instruction or
      bypass an error handler by using the BNV (branch if no overflow)
      instruction. These instructions can be performed after any ALU
      operation that may cause an accumulator overflow.

      The overflow mode is a feature useful for DSP applications. This
      mode simulates the saturation effect characteristic of analog
      systems. When enabled, any overflow in the accumulator results in
      the accumulator contents being replaced with the largest positive
      value (>7FFFFFFF) if the overflowed number is positive, or the
      largest negative value (>80000000) if negative. The overflow mode
      is controlled by the OVM bit of status register ST0 and can be
      changed by the SOVM (set overflow mode), ROVM (reset overflow mode),
      or LST (load status register ST0) instructions. Overflows can be
      detected in software by testing the OV (overflow) bit in status
      register ST0. When a branch is used to test the overflow bit, OV is
      automatically reset. Note that the OV bit does not function as a
      carry bit. It is set only when the absolute value of a number is too
      large to be represented in the accumulator, and it is not reset
      except by specific instructions.

      Another method of overflow management, which applies to the
      multiply-accumulate instructions, is the use of the right shifter
      of the product register. The right shifter, which operates with no
      cycle overhead, allows up to 128 accumulations without the
      possibility of an overflow. The least-significant six bits of the
      product are lost, and the MSB's are filled with sign bits. This
      feature is initiated by setting the PM bits of status register ST1
      to 11 using the SPM or LST1 instructions.

      The TMS320C2x also has a right shift of the accumulator (using the
      SFR instruction) to scale down the accumulator when it nears
      overflow.