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X-Hacker.org- TMS320C2x DSP - the tms320c2x hardware multiplier normally performs two's-complement http://www.X-Hacker.org [<<Previous Entry] [^^Up^^] [Next Entry>>] [Menu] [About The Guide]
      The TMS320C2x hardware multiplier normally performs two's-complement
      16-bit by 16-bit multiplies and produces a 32-bit result in one
      processor cycle. A single TMS320C25 instruction, MPYU, can be used
      to multiply two 16-bit unsigned numbers. to multiply two operands,
      one operand must be loaded into the T register (TR). The second
      operand is moved by the multiply instruction to the multiplier,
      which then produces the product in the P register (PR). Before
      another multiply can be performed, the contents of the PR must be
      moved to the accumulator. By pipelining multiplies and PR moves,
      most multiply operations can be performed with a single instruction.
      A single multiply instruction follows:

*  THIS ROUTINE MULTIPLIES TWO VALUES IN DATA MEMORY LOCATIONS
*  >200 AND >201 WITH THE RESULT STORED IN >202 AND >203.
*
MUL   LRLK  AR1,>200    ; POINT AT BLOCK B0.
      LARP  1
      LT    *+          ; GET FIRST VALUE AT >200.
      MPY   *+          ; MULTIPLY BY VALUE AT >201.
      PAC               ; PUT RESULT IN ACCUMULATOR.
      SACL  *+          ; STORE LOW WORD AT >202.
      SACH  *           ; STORE HIGH WORD AT >203.
      RET               ; RETURN TO MAIN PROGRAM.

      A common operation in DSP algorithms is the summation of products.
      The MAC instruction, normally performed in multiple cycles, adds the
      contents of the PR to the accumulator and simultaneously reads two
      values and multiplies them. When using the MAC instruction, a data
      memory value is multiplied by a program memory value. One of the
      operands can come from block B1 or B2 in on-chip data memory while
      the other operand may come from block B0. Block B0 must be
      configured as program memory when it supplies the second operand.
      Pipelining of the MAC instruction with a repeat instruction results
      in an execution time for each succeeding multiply-and-accumulate
      operation of only one cycle.

*     TMS32020:
*                        CLOCK  TOTAL CLOCK PROGRAM TOTAL PROGRAM
*                        CYCLES    CYCLES    MEMORY     MEMORY
      LARP  AR1         ;  1         1         1          1
      LRLK  AR1,>300    ;  2         3         2          3
      CNFP              ;  1         4         1          4
      ZAC               ;  1         5         1          5
      MPYK  0           ;  1         6         1          6
      RPTK  <N-1>       ;  1         7         1          7
      MAC   >FF00,*+    ; 2+N       9+N        2          9
      APAC              ;  1       10+N        1         10


*     TMS320C25:
*                        CLOCK  TOTAL CLOCK PROGRAM TOTAL PROGRAM
*                        CYCLES    CYCLES    MEMORY     MEMORY
      LARP  AR1         ;  1         1         1          1
      LRLK  AR1,>300    ;  2         3         2          3
      CNFP              ;  1         4         1          4
      ZAC               ;  1         5         1          5
      MPYK  0           ;  1         6         1          6
      RPTK  <N-1>       ;  1         7         1          7
      MAC   >FF00,*+    ; 3+N      10+N        2          9
      APAC              ;  1       11+N        1         10

See Also: squaring

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