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X-Hacker.org- TMS320C2x DSP - division is implemented on the tms320c2x by repeated subtractions http://www.X-Hacker.org [<<Previous Entry] [^^Up^^] [Next Entry>>] [Menu] [About The Guide]
      Division is implemented on the TMS320C2x by repeated subtractions
      using SUBC, a special conditional subtract instruction.  Given a 16
      bit positive dividend and divisor, the repetition of the SUBC
      command 16 times produces a 16-bit quotient in the low accumulator
      and a 16-bit remainder in the high accumulator.

      SUBC implements binary division in the same manner as is commonly
      done in long division.  The dividend is shifted until subtracting
      the divisor no longer produces a negative result.  For each subtract
      that does not produce a negative answer, a one is put in the LSB of
      the quotient and then shifted.  The shifting of the remainder and
      quotient after each subtract produces the separation of the quotient
      and remainder in the low and high halves of the accumulator.

      There are similarities between long division and the SUBC method of
      division.  Both methods are used to divide 33 by 5.

      Long Division:
                              0000 0000 0000 0110     Quotient
                             +-------------------
         0000 0000 0000 0101 |0000 0000 0010 0001
                                          -1 01
                                          -----
                                             110
                                            -101
                                            ----
                                               11     Remainder

      SUBC Method:

      |High Accumulator | | Low Accumulator |        Comments
      xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx -------------------------
      0000 0000 0000 0000 0000 0000 0010 0001 Dividend is loaded into ACC.
                      -10 1000 0000 0000 0000 The divisor is left-shifted
      --------------------------------------- 15 and subtracted from ACC.
                      -10 0111 1111 1101 1111 The subtraction is negative,
                                              so discard the result and
                                              shift left the ACC one bit.
      0000 0000 0000 0000 0000 0000 0100 0010 Second subtract produces
                      -10 1000 0000 0000 0000 negative answer, so discard
      --------------------------------------- result and shift ACC left.
                      -10 0111 1111 1011 1110

                  continue                    continue

      0000 0000 0000 0100 0010 0000 0000 0000 14th SUBC command. The
                      -10 1000 0000 0000 0000 result is positive. Shift
      --------------------------------------- result left and replace LSB
      0000 0000 0000 0001 1010 0000 0000 0000 with "1".

      0000 0000 0000 0011 0100 0000 0000 0001 Result is again positive.
                      -10 1000 0000 0000 0000 Shift result left and
      --------------------------------------- replace LSB with "1".
      0000 0000 0000 0000 1100 0000 0000 0001

      0000 0000 0000 0001 1000 0000 0000 0011 Last subtract. Negative
                      -10 1000 0000 0000 0000 answer, so discard result
      --------------------------------------- and shift ACC left.
                         -1111 1111 1111 1101
      ---------------------------------------
      0000 0000 0000 0011 0000 0000 0000 0110 Answer reached after 16 SUBC
     +---------------------------------------+instructions.
           Remainder            Quotient


      The condition of the divisor, less than the shifted dividend, is
      determined by the sign of the result, both the dividend and divisor
      must be positive when using the SUBC command.  Thus, the sign of the
      quotient must be determined and the quotient computed using the
      absolute value of the dividend and divisor.

      Integer and fractional division can be implemented with the SUBC
      instruction as shown in the examples respectively.  When
      implementing a divide algorithm, it is important to know if the
      quotient can be represented as a fraction and the degree of accuracy
      to which the quotient is to be computed.  For integer division, the
      absolute values of the numerator must be greater than the absolute
      value of the denominator.  For fractional division, the absolute
      value of the numerator must be less than the absolute value of the
      denominator.

      SUBC and Integer Division:

*  THIS ROUTINE IMPLEMENTS INTEGER DIVISION.
*
DN1   LT    NUMERA      ; GET SIGN OF QUOTIENT.
      MPY   DENOM
      PAC
      SACH  TEMSGN      ; SAVE SIGN OF QUOTIENT.
      LAC   DENOM
      ABS
      SACL  DENOM       ; MAKE DENOMINATOR POSITVE.
      LAC   NUMERA      ; ALIGN NUMERATOR.
      ABS
*
*  IF DIVISOR AND DIVIDEND ARE ALIGNED, DIVISION CAN START HERE.
*
      RPTK  15
      SUBC  DENOM       ; 16-CYCLE DIVIDE LOOP
      SACL  QUOT
      LAC   TEMSGN
      BGEZ  DONE        ; DONE IF SIGN POSITIVE.
      ZAC
      SUB   QUOT
      SACL  QUOT        ; NEGATE QUOTIENT IF NEGATIVE.
DONE  LAC   QUOT
      RET               ; RETURN TO MAIN PROGRAM.


      SUBC and Fractional Division:

*  THIS ROUTINE IMPLEMENTS FRACTIONAL DIVISION.
*
DN1   LT    NUMERA      ; GET SIGN OF QUOTIENT.
      MPY   DENOM
      PAC
      SACH  TEMSGN      ; SAVE SIGN OF QUOTIENT.
      LAC   DENOM
      ABS
      SACL  DENOM       ; MAKE DENOMINATOR POSITVE.
      ZALH  NUMERA      ; ALIGN NUMERATOR.
      ABS
*
*  IF DIVISOR AND DIVIDEND ARE ALIGNED, DIVISION CAN START HERE.
*
      RPTK  14
      SUBC  DENOM       ; 15-CYCLE DIVIDE LOOP
      SACL  QUOT
      LAC   TEMSGN
      BGEZ  DONE        ; DONE IF SIGN POSITIVE.
      ZAC
      SUB   QUOT
      SACL  QUOT        ; NEGATE QUOTIENT IF NEGATIVE.
DONE  LAC   QUOT
      RET               ; RETURN TO MAIN PROGRAM.

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