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PUNPCKLBW       Unpack (interleave) Low-order Bytes

PUNPCKLBW destination, source                        CPU: MMX

        Logic   mm(63..56) <- mm/m32(31..24)
                mm(55..48) <- mm(31..24)
                mm(47..40) <- mm/m32(23..16)
                mm(39..32) <- mm(23..16)
                mm(23..16) <- mm(15..8)
                mm(31..24) <- mm/m32(15..8)
                mm(15..8)  <- mm/m32(7..0)
                mm(7..0)   <- mm(7..0)

    PUNPCKLBW interleaves the four low-order bytes of the source operand
    and the four low-order bytes of the destination operand and writes
    them to the destination.

    The destination operand is an MMX register. The source operand can
    either be an MMX register or a 64-bit memory operand. 

    When unpacking from a memory operand, only 32 bits are accessed.


    Note
    If the source operand is all zeros, this instruction converts bytes
    to unsigned words.


    Opcode      Format
    0F 60 /r    PUNPCKLBW mm, mm/m64