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PMULHW          Packed Multiply High on Words

PMULHW destination, source                           CPU: MMX

        Logic
        mm(15..0)  <- ( mm(15..0)  * mm/m64(15..0)  ) SHR 16
        mm(31..16) <- ( mm(31..16) * mm/m64(31..16) ) SHR 16
        mm(47..32) <- ( mm(47..32) * mm/m64(47..32) ) SHR 16
        mm(63..48) <- ( mm(63..48) * mm/m64(63..48) ) SHR 16
    
    The PMULHW instruction multiplies the four signed words of the
    destination operand with the four signed words of the source operand.
    The high-order 16 bits of the 32-bit intermediate results are written
    to the destination operand.

    The destination operand is an MMX register. The source operand can
    either be an MMX register or a 64-bit memory operand. 


    Opcode      Format
    0F E5 /r    PMULHW mm, mm/m64