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PADDD           Add with Wrap-around on Doubleword

PADDD destination, source                            CPU: MMX

        Logic   mm(31..0)  <- mm(31..0)  + mm/m64(31..0)
                mm(63..32) <- mm(63..32) + mm/m64(63..32)

    PADDD adds the doublewords of the source operand to the doublewords
    of the destination operand and writes the results to destination.

    When the result is too large to be represented in a packed doubleword
    (overflow), the result wraps around and the lower 32 bits are written
    to the destination register.
    
    The destination operand is an MMX register. The source operand can
    either be an MMX register or a 64-bit memory operand.


    Opcode      Format
    0F FE /r    PADDD mm, mm/m64