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Segment descriptors

    Descriptors are those objects to which the segment selectors
    point. They are 8-byte quantities that contain attributes about a
    given linear address space (that is, about a segment). These
    attributes include the segment 32-bit base linear address, the
    segment's 20-bit length and granularity, the protection level,
    read, write or execute privileges, the default size of the
    operands (16- or 32-bit), and the type of segment.

    All descriptor attribute information is contained in 12 bits of
    the segment descriptor. Segments on the 80386+ have three attribute
    fields in common: the P (Present) bit, the DPL (Descriptor
    Privilege Level) bits, and the S (Segment Descriptor) bit.

    Segment descriptors are stored in either a Global Descriptor Table
    (GDT) or Local Descriptor Table (LDT). The 80386+ locates the GDT
    and the current LDT in memory by means of the GDTR and LDTR
    registers.

    A segment descriptor provides the 80386+ with the data it needs to
    map a logical address into a linear address. These descriptors are
    not created by programs, but by compilers, linkers, loaders, or
    the operating system.

    ------------------------------------------------------------------

    General segment descriptor format:
    
     6               5       5       4       4     4 3             3
     3               5       1       7       3     0 9             2
    +---------------------------------------------------------------+
    | Base 31..24   |G|D|0|A|Seg lim|P|DPL|S| Type  | Base 23..16   |
    |               | | | |V| 19..16| |   | |      A|               |
    |-------------------------------+-------------------------------|
    | Base Address 15..0            | Segment Limit 15..0           |
    +---------------------------------------------------------------+
     3               2               1
     1               3               5               7             0

    Note: In descriptors used for application code and data segments,
            bit 40 = Accessed field
          Bits 40-47 = Access Right Byte

    BASE        Defines the location of the segment within the
                4 gigabyte linear address space. The 3 fragments of
                the base address are concatenated to form a single
                32-bit value.

    LIMIT       Defines the size of the segment. The 2 parts of
                the field are linked to form a 20-bit result.

    Granularity When 0, LIMIT is interpreted as units of 1 byte.
                When 1, LIMIT is interpreted as units of 4 KB.

    Default operation size
                When D=0, operands and effective addresses default to
                16 bits in length; when D=1, 32 bits.

    AVailable for programmer use

    segment Present
                If this bit holds a 0 value, the descriptor is not
                valid for use in address translation. The 80386+
                signals an exception when a selector for the
                descriptor is loaded into a segment register.


    DPL - Descriptor Privilege Level defines the privilege level
                of the segment. It controls access to the segment
                using the protection mechanism.

    Segment     0 = system segment, 1 = code or data segment.

    Type
                System segments:
                    1 = available 286 TSS
                    2 = load descriptor table
                    3 = busy 286 TSS
                    4 = 286 call gate
                    5 = 286/386 task gate
                    6 = 286 interrupt gate
                    7 = 286 trap gate
                    9 = available 80386/486 TSS
                    B = busy      80386/486 TSS
                    C = 80386/486 call gate
                    E = 80386/486 interrupt gate
                    F = 80386 trap gate, 80486 task gate
                    0,8,A,D = reserved

                Application code and data segments:
                    Specifies the kind of access that can be made to
                    the segment.

                               Descriptor
                    T E W A       type    Description
                    0 0 0 0   0   Data    Read-only
                    0 0 0 1   1   Data    -, accessed
                    0 0 1 0   2   Data    Read/Write
                    0 0 1 1   3   Data    -, accessed
                    0 1 0 0   4   Data    Read-only, expand-down
                    0 1 0 1   5   Data    -, accessed
                    0 1 1 0   6   Data    Read/Write, expand-down
                    0 1 1 1   7   Data    -, accessed
                    T C R A 
                    1 0 0 0   8   Code    Execute-only
                    1 0 0 1   9   Code    -, accessed
                    1 0 1 0   A   Code    Execute/Read
                    1 0 1 1   B   Code    -, accessed
                    1 1 0 0   C   Code    Execute-only, conforming
                    1 1 0 1   D   Code    -, accessed
                    1 1 1 0   E   Code    Execute/Read-only, conforming
                    1 1 1 1   F   Code    -, accessed


    ------------------------------------------------------------------

    Note
    For compatibility, the 80386+ support all the 80286 segment
    descriptors. The only difference between the two formats are that
    the values of the type fields and the limit and base address
    fields have been expanded for the 80386+.

    The 80286 system segment descriptors contain a 24-bit address and
    a 16-bit limit. The 80386+ system descriptors, on the other
    hand, have a 32-bit base address, a 20-bit limit, and a
    granularity bit. To tell the difference, if the upper word of the
    descriptor is zero, then it is an 80286-type descriptor.

    ------------------------------------------------------------------

    Descriptor tables

    Descriptor tables define all the segments used in the protected
    mode system. The 3 types of tables are:

        . Global Descriptor Table     (GDT)
        . Local Descriptor Table      (LDT)
        . Interrupt Descriptor Table  (IDT)

    Descriptor tables are variable-length memory arrays, with 8-byte
    entries that contain descriptors. In the 80386+, they range in
    size from 8 bytes to 64K, and each table holds up to 8192 8-byte
    descriptors. The upper 13 bits of a selector are used as an index
    into the descriptor table.


    GDT
    Every protected mode 80386 system contains a Global Descriptor
    Table. The GDT holds descriptors that are available to all the
    tasks in a system. Except for descriptors that control interrupts
    or exceptions, the GDT can contain any other kind of segment
    descriptor.
    Generally, the GDT contains 3 types of descriptors: code and data
    segments used by the operating system, descriptors for the Local
    Descriptors in a system, and task state segments (TSS). The first
    slot of the GDT is not used; it corresponds to the null selector
    which defines a null pointer value.


    LDT
    Operating systems are generally designed so that each task has a
    separate Local Descriptor Table. LDTs provide a way for isolating
    a given task's code and data segments from the rest of the
    operating system. The GDT contains descriptors for segments that
    are common to all tasks. The LDT is associated with a given task
    and may contain only code, data, stack, task gate, and call gate
    descriptors.
    A segment cannot be accessed by a task if its segment descriptor
    does not exist either in the current LDT or the GDT. This both
    isolates and protects that task's segments, while still allowing
    global data to be shared among tasks.
    Unlike the 48-bit GDTR and IDTR, the LDTR contains only a 16-bit
    selector which refers to an LDT descriptor in the GDT.


    IDT
    The Interrupt Descriptor Table contains the descriptors that point
    to the location of up to 256 interrupt service routines. The IDT
    can only contain trap gates, task gates, and interrupt gates. The
    IDT should be at least 256 bytes in size so it can hold
    descriptors for the 32 Intel-reserved interrupts. Every interrupt
    used by the system must have an entry in the IDT.