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LOCK            Lock the Bus                         Flags: Not altered

LOCK instruction                                     IOv86

    LOCK is used as a prefix to instructions that reference memory
    shared by more than one processor.

    The LOCK prefix causes the LOCK# signal of the CPU to be asserted
    during executing of the instruction that follows it. In a multi-
    processor environment, this signal can be used to ensure that the
    CPU has exclusive use of any shared memory while LOCK# is
    asserted.

    On the 80386 and 80486, the LOCK prefix works only with the
    following instructions (otherwise undefined opcode trap):
        BT,BTS,BTR,BTC                  mem,reg/imm
        ADD,OR,ADC,SBB,AND,SUB,XOR      mem,reg/imm
        NOT,NEG,INC,DEC                 mem
        XCHG                            reg,mem  OR  mem,reg
        CMPXCHG,XADD                    mem,reg        ; 486+

    The XCHG instruction always asserts LOCK# regardless of the
    presence or absence of the LOCK prefix.

    
    Note
    The integrity of the LOCK is not affected by the alignment of the
    memory field. Memory locking is observed for arbitrarily
    misaligned fields.

    Locked access is not assured if another CPU processor is
    executing an instruction concurrently that has one of the
    following characteristics:
    - is not preceded by a LOCK prefix
    - is not one of the instructions listed above
    - specifies a memory operand that does not exactly overlap the
      destination operand. Locking is not guaranteed for partial
      overlap, even if one memory operand is wholly contained within
      another.

    The LOCK prefix is IOPL-sensitive in V86 mode.


    Opcode      Format
    F0 ...      LOCK ...                ; Prefix


    Length and timing
    -           Bytes   8088    186     286     386     486     Pentium
    ...          1       2       2       0       0       1       1   NP