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SYNTAX      DIRECT   [<LABEL>] BLKD <dma1>,<dma2>
            INDIRECT [<LABEL>] BLKD <dma1>,{ind}[,<next ARP>]

OPERANDS    0 . dma1 . 65535; 0 . dma2 . 127; 0 . next ARP . 7.

EXECUTION   TMS32020

                  (PC) + 2 . TOS
                  dma1 . PC
                  If (repeat counter) is not equal to zero:
                        Then (dma1, addressed by PC) . dma2,
                             modify AR(ARP) and ARP as specified,
                             (PC) + 1 . PC,
                             (repeat counter) - 1 . repeat counter;
                        Else (dma1, addressed by PC) . dma2,
                             modify AR(ARP) and ARP as specified.
                  (TOS) . PC

             TMS320C25

                  (PC) + 2 . PC
                  (PFC) . MCS
                  dma1 . PFC
                  If (repeat counter) is not equal to zero:
                        Then (dma1, addressed by PFC) . dma2,
                             modify AR(ARP) and ARP as specified,
                             (PFC) + 1 . PFC,
                             (repeat counter) - 1 . repeat counter;
                        Else (dma1, addressed by PFC) . dma2,
                             modify AR(ARP) and ARP as specified.
                  (MCS) . PFC

DESCRIPTION Consecutive memory words are moved from a source data memory
            block to the destination data memory block. The starting
            address (lowest) of the source block is defined by the second
            word of the instruction. The starting address of the
            destination block is defined by either the dma contained in
            the opcode (for direct addressing) or the current AR (for
            indirect addressing). In the indirect addressing mode, both
            the current AR and ARP may be modified in the usual manner.
            In the direct addressing mode, dma2 is used as the destination
            address for the block move but is not modified upon repeated

            executions of the instruction. Thus, the contents of memory
            at the dma2 address will be the same as the contents of memory
            at the last dma1 address in a repeat sequence. RPT and RPTK
            must be used with the BLKD instruction, in the indirect
            addressing mode, if more than one word is to be moved. The
            number of words to be moved is one greater than the number
            contained in the repeat counter RPTC at the beginning of the
            instruction. At the end of this instruction, the RPTC contains
            zero and, if using indirect addressing , AR(ARP) will be
            modified to contain the address after the end of the
            destination block. Note that the source and destination blocks
            do not have to be entirely on-chip or off-chip. However, BLKD
            cannot be used to transfer data from a memory-mapped register
            to any other location in data memory.

            The PC points to the instruction following BLKD after
            execution. Interrupts are inhibited during a BLKD operation
            used with RPT or RPTK.

            The BLKD instruction on the TMS32020 uses one level of stack;
            therefore, the value on the bottom of the stack is lost since
            the stack is pushed and popped during the instruction
operation.

WORDS       2

ENCODING    15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
            +-----------------------------------------------+
            |1  1  1  1  1  1  0  1| 0|data memory address 2| DIRECT
            |-----------------------------------------------|
            |             data memory address 1             |
            +-----------------------------------------------+

            15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
            +-----------------------------------------------+
            |1  1  1  1  1  1  0  1| 1| see indirect fields | INDIRECT
            |-----------------------------------------------|
            |             data memory address 1             |
            +-----------------------------------------------+

CYCLES

            +-------------------------------------------------------+
            |       Cycle Timings for a Single Instruction          |
            |-------------------------------------------------------|
            | PI/DI | PI/DE  |  PE/DI  |   PE/DE   | PR/DI | PR/DE  |
            |-------------------------------------------------------|
      '20   |Data source internal (DI/DE refer to data destination) |
            |-------------------------------------------------------|
            |   3   |   3+d  |   3+2p  |  3+d+2p   |   -   |   -    |
            |-------------------------------------------------------|
      '20   |Data source external (DI/DE refer to data destination) |
            |-------------------------------------------------------|
            |  3+d  |   4+2d | 3+d+2p  |  4+2d+2p  |   -   |   -    |
            |-------------------------------------------------------|
      'C25  |              Source data in on-chip RAM               |
            |-------------------------------------------------------|
            |   3   |   3+d  |   3+2p  |   3+d+2p  |   3   |   3+d  |
            |-------------------------------------------------------|
      'C25  |            Source data in external memory             |
            |-------------------------------------------------------|
            |  4+d  |  4+2d  |  4+d+2p |  4+d+2p   |  4+d  |  4+2d  |
            |-------------------------------------------------------|
            |       Cycle Timings for a Repeat Instruction          |
            |-------------------------------------------------------|
       '20  |Data source internal (DI/DE refer to data destination) |
            |-------------------------------------------------------|
            |  2+n  | 2+n+nd |  2+n+2p | 2+n+nd+2p |   -   |   -    |
            |-------------------------------------------------------|
       '20  |Data source external (DI/DE refer to data destination) |
            |-------------------------------------------------------|
            | 2+n+nd|2+2n+2nd|2+n+nd+2p|2+2n+2nd+2p|   -   |   -    |
            |-------------------------------------------------------|
      'C25  |               Source data in on-chip RAM              |
            |-------------------------------------------------------|
            |  2+n  | 2+n+nd | 2+n+2p  | 2+n+nd+2p |   -   |   -    |
            |-------------------------------------------------------|
      'C25  |             Source data in external memory            |
            |-------------------------------------------------------|
            | 3+n+nd|2+2n+2nd|3+n+nd+2p|2+2n+2nd+2p|3+n+nd |2+2n+2nd|
            +-------------------------------------------------------+



EXAMPLE     RPTK  2
            BLKD  >F400,*+    If current auxiliary register contains 1030.

              BEFORE              AFTER
      dma1
          dm62464 >7F98       dm62464 >7F98
          dm62465 >FFE6       dm62465 >FFE6
          dm62466 >9522       dm62466 >9522
      dma2
           dm1030 >8DEE        dm1030 >7F98
           dm1031 >9315        dm1031 >FFE6
           dm1032 >2531        dm1032 >9522