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X-Hacker.org- TMS320C2x DSP - when programming time-critical high-computational tasks, it is often http://www.X-Hacker.org [<<Previous Entry] [^^Up^^] [Next Entry>>] [Menu] [About The Guide]
      When programming time-critical high-computational tasks, it is often
      necessary to repeat the same operation many times. For these cases,
      repeat instructions that allow the execution of the next single
      instruction (N + 1) times are provided. N is defined by an eight-
      bit repeat counter (RPTC), which is loaded by the RPT or RPTK
      instructions. The instruction immediately following is executed, and
      the RPTC is decremented until it reaches zero.

      When using the repeat feature, the instruction being repeated is
      fetched only once. As a result, many multi-cycle instructions become
      single-cycle when repeated. This is especially useful for I/O
      instructions, such as TBLR/TBLW, IN/OUT, or BLKD/BLKP.

      Since the instruction is fetched and internally latched, the program
      bus can be used to fetch or write a second operand in parallel to
      operations using the data bus. With the instruction latched for
      repeated execution, the program counter can be loaded with a data
      address and incremented on succeeding executions to fetch data and
      successive memory locations. As an example, the MAC instruction
      fetches the multiplicand from program memory via the program bus.
      Simultaneous with the program bus fetch, the second multiplicand is
      fetched from data memory via the data bus. In addition to these data
      fetches, preparation is made for accesses in the following cycles
      by incrementing the program counter and by indexing the auxiliary
      register. TBLR is another example of an instruction that benefits
      from the simultaneous transfers of data on both the program and data
      buses. In this case, data values from a table in program memory may
      be read and transferred to data memory. When repeated, the program
      overhead of reading the instruction from program memory must be
      executed only once, thus allowing the rest of the executions to
      operate in a single cycle.

      Programs, such as those implementing digital filters, require loops
      that execute in a minimum amount of time. The following shows the
      use of the RPT or RPTK instructions:

*  THIS ROUTINE USES THE RPT INSTRUCTION TO SET UP THE LOOP
*  COUNTER IN ONE CYCLE. THE FOLLOWING EQUATION IS IMPLEMENTED
*  IN THIS ROUTINE:
*                       10
*                     ------
*                     \      X(I) * Y(I)
*                     /
*                     ------
*                      I = 1
*
*  THIS ROUTINE ASSUMES THAT THE X-VALUES ARE LOCATED IN
*  ON-CHIP RAM BLOCK B0, AND THE Y-VALUES ARE IN BLOCK B1. WHEN
*  REPLACING RPT NUM WITH RPTK  9, THE PROGRAM WILL EXECUTE
*  IN THE SAME WAY.
*
SERIES      LARP  AR4
            CNFP              ; CONFIG BLOCK B0 AS PROGRAM MEMORY.
            LACK  9           ; SET COUNTER TO 9.
            SACL  NUM         ; (NUM) = 9.
            LRLK  AR4,>300    ; POINT AT BEGINNING OF DATA.
            MPYK  >0          ; CLEAR P REGISTER.
            ZAC               ; CLEAR ACCUMULATOR.
            RPT   NUM         ; EXECUTE NEXT INSTRUCTION 10 TIMES.
            MAC   >FF00,*+    ; MULTIPLY-ACCUMULATE; INCREMENT AR4.
            APAC              ; ADD P REGISTER TO ACCUMULATOR.
            RET               ; RETURN TO MAIN PROGRAM.

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