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SYNTAX      DIRECT   [<LABEL>] AND <dma>
            INDIRECT [<LABEL>] AND {ind}[,<next ARP>]

OPERANDS    0 . dma . 127; 0 . next ARP . 7.

EXECUTION   (PC) + 1 . PC
            (ACC(15-0)).AND.(dma) . ACC(15-0)
            0 . ACC(31-16)
            Not affected by SXM.

DESCRIPTION The lower half of the accumulator is AND'ed with the contents
            of the addressed data memory location. The upper half of the
            accumulator is AND'ed with all zeroes. Therefore, the upper
            half of the accumulator is always zeroed by the AND
            instruction.

WORDS       1

ENCODING    15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
            +-----------------------------------------------+
            |0  1  0  0  1  1  1  0| 0| data memory address | DIRECT
            +-----------------------------------------------+

            15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
            +-----------------------------------------------+
            |0  1  0  0  1  1  1  0| 1| see indirect fields |  INDIRECT
            +-----------------------------------------------+

CYCLES

            +------------------------------------------------+
            |    Cycle Timings for a Single Instruction      |
            |------------------------------------------------|
            | PI/DI | PI/DE | PE/DI | PE/DE  | PR/DI | PR/DE |
            |-------+-------+-------+--------+-------+-------|
      '20   |   1   |  2+d  |  1+p  | 2+d+p  |   -   |   -   |
            |-------+-------+-------+--------+-------+-------|
     'C25   |   1   |  2+d  |  1+p  | 2+d+p  |   1   |  2+d  |
            |------------------------------------------------|
            |    Cycle Timings for a Repeat Instruction      |
            |------------------------------------------------|
      '20   |   n   | 2n+nd |  n+p  |2n+nd+p |   -   |   -   |
            |-------+-------+-------+--------+-------+-------|
     'C25   |   n   |1+n+nd | n+p   |1+n+nd+p|   n   |1+n+nd |
            +------------------------------------------------+



EXAMPLE     AND   DAT16       (DP = 4)
            or
            AND   *           If current auxiliary register contains 528.

                      BEFORE              AFTER

             dm528       >FF    dm528       >FF
             ACC X >12345678    ACC X >00000078
                 C                  C

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