Click above to get retro games delivered to your door ever month!

SYNTAX      DIRECT   [<LABEL>] SUBC <dma>
            INDIRECT [<LABEL>] SUBC {ind}[,<next ARP>]

OPERANDS    0 . dma . 127; 0 . next ARP . 7.

EXECUTION   (PC) + 1 . PC
            (ACC) - [(dma) * 2 ^15] . ACC
            If ALU . 0:
              Then (ALU output) * 2 + 1 . ACC;
              Else (ACC) * 2 . ACC.
            Affects OV; not affected by OVM (no saturation) or SXM.
            Affects C (TMS320C25).

DESCRIPTION The SUBC instruction performs conditional subtraction which
            may be used for division. The 16-bit dividend is placed in the
            low accumulator, and the high accumulator is zeroed. The
            divisor is in data memory. SUBC is executed 16 times for 16-
            bit division. After completion of the last SUBC, the quotient
            of the division is in the low-order 16-bit field of the
            accumulator, and the remainder is in the high-order 16 bits
            of the accumulator. SUBC assumes the divisor and the dividend
            are both positive.

            If the 16-bit dividend contains less than 16 significant bits,
            the dividend may be placed in the accumulator left-shifted by
            the number of leading non-significant zeros. The number of
            executions of SUBC is reduced from 16 by that number. One
            leading zero is always significant.

            Note that SUBC affects OV but is not affected by OVM, and
            therefore the accumulator does not saturate upon positive or
            negative overflows when executing this instruction.

WORDS       1

ENCODING    15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
            +-----------------------------------------------+
            |0  1  0  0  0  1  1  1| 0| data memory address | DIRECT
            +-----------------------------------------------+

            15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
            +-----------------------------------------------+
            |0  1  0  0  0  1  1  1| 1| see indirect fields | INDIRECT
            +-----------------------------------------------+

CYCLES

            +------------------------------------------------+
            |    Cycle Timings for a Single Instruction      |
            |------------------------------------------------|
            | PI/DI | PI/DE | PE/DI | PE/DE  | PR/DI | PR/DE |
            |-------+-------+-------+--------+-------+-------|
      '20   |   1   |  2+d  |  1+p  | 2+d+p  |   -   |   -   |
            |-------+-------+-------+--------+-------+-------|
     'C25   |   1   |  2+d  |  1+p  | 2+d+p  |   1   |  2+d  |
            |------------------------------------------------|
            |    Cycle Timings for a Repeat Instruction      |
            |------------------------------------------------|
      '20   |   n   | 2n+nd |  n+p  | 2n+nd+p|   -   |   -   |
            |-------+-------+-------+--------+-------+-------|
     'C25   |   n   |1+n+nd |  n+p  |1+n+nd+p|   n   |1+n+nd |
            +------------------------------------------------+



EXAMPLE     RPTK  15
            SUBC  DAT2        (DP = 4)
            or
            RPTK  15
            SUBC  *           If current auxiliary register contains 514.

               BEFORE                AFTER

            dm514  >7         dm514     >7
            ACC X >41         ACC 1 >20009
                C                 C