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SYNTAX [<LABEL>] SPM <constant>
OPERANDS 0 . constant . 3
EXECUTION (PC) + 1 . PC
Constant . product register shift mode (PM) status bits
Affects PM.
DESCRIPTION The two low-order bits of the instruction word are copied into
the PM field of status register ST1. The PM status bits
control the P register output shifter. This shifter has the
ability to shift the P register output either one or four bits
to the left or six bits to the right, or to perform no shift.
The bit combinations and their meanings are:
PM ACTION
00 No shift of multiplier output
01 Output left-shifted 1 place and zero-filled
10 Output left-shifted 4 places and zero-filled
11 Output right-shifted 6 places, sign-
extended; LSB bits lost.
WORDS 1
ENCODING 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+-----------------------------------------------+
|1 1 0 0 1 1 1 0 0 0 0 0 1 0| PM |
+-----------------------------------------------+
CYCLES
+------------------------------------------------+
| Cycle Timings for a Single Instruction |
|------------------------------------------------|
| PI/DI | PI/DE | PE/DI | PE/DE | PR/DI | PR/DE |
|-------+-------+-------+--------+-------+-------|
'20 | 1 | 1 | 1+p | 1+p | - | - |
|-------+-------+-------+--------+-------+-------|
'C25 | 1 | 1 | 1+p | 1+p | 1 | 1 |
|------------------------------------------------|
| Cycle Timings for a Repeat Instruction |
|------------------------------------------------|
'20 | not repeatable | - | - |
|------------------------------------------------|
'C25 | not repeatable |
+------------------------------------------------+
EXAMPLE SPM 3 Product register shift mode 3 is selected,
causing all subsequent transfers from the
product register to the ALU to be shifted
to the right six places.