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SYNTAX      [<LABEL>] ROVM

OPERANDS    None

EXECUTION   (PC) + 1 . PC
            0 . OVM status bit in status register ST0
            Affects OVM.

DESCRIPTION The OVM status bit is reset to logic zero, which disables the
            overflow mode. If an overflow occurs with OVM reset, the OV
            (overflow flag) is set, and the overflowed result is placed
            in the accumulator.

            OVM may also be loaded by the LST and SOVM instructions.

WORDS       1

ENCODING    15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
            +-----------------------------------------------+
            |1  1  0  0  1  1  1  0  0  0  0  0  0  0  1  0 |
            +-----------------------------------------------+

CYCLES

            +------------------------------------------------+
            |    Cycle Timings for a Single Instruction      |
            |------------------------------------------------|
            | PI/DI | PI/DE | PE/DI | PE/DE  | PR/DI | PR/DE |
            |-------+-------+-------+--------+-------+-------|
      '20   |   1   |   1   |  1+p  |  1+p   |   -   |   -   |
            |-------+-------+-------+--------+-------+-------|
     'C25   |   1   |   1   |  1+p  |  1+p   |   1   |   1   |
            |------------------------------------------------|
            |    Cycle Timings for a Repeat Instruction      |
            |------------------------------------------------|
      '20   |   n   |   n   |  n+p  |  n+p   |   -   |   -   |
            |-------+-------+-------+--------+-------+-------|
     'C25   |   n   |   n   |  n+p  |  n+p   |   n   |   n   |
            +------------------------------------------------+



EXAMPLE     ROVM              The overflow mode bit OVM is reset,
                              disabling the overflow mode on any
                              subsequent arithmetic operations.