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SYNTAX      DIRECT   [<LABEL>] LTD <dma>
            INDIRECT [<LABEL>] LTD {ind}[,<next ARP>]

OPERANDS    0 . dma . 127; 0 . next ARP . 7.

EXECUTION   (PC) + 1 . PC
            (dma) . T register
            (dma) . dma + 1
            (ACC) + (shifted P register) . ACC

            Affects OV; affected by OVM and PM.
            Affects C (TMS320C25).

DESCRIPTION The T register is loaded with the contents of the specified
            data memory address (dma). The contents of the P register,
            shifted as defined by the PM status bits, are added to the
            accumulator, and the result placed in the accumulator. The
            contents of the specified data memory address are also copied
            to the next higher data memory address.

            This instruction is valid for blocks B1 and B2, and is also
            valid for block B0 if block B0 is configured as data memory.
            the data move function is continuous across the boundary of
            blocks B0 and B1, but cannot be used with external data memory
            or memory-mapped registers. This function is described under
            the instruction DMOV. Note that if used with external data
            memory the function of LTD is identical to that of LTA.

WORDS       1

ENCODING    15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
            +-----------------------------------------------+
            |0  0  1  1  1  1  1  1| 0| data memory address | DIRECT
            +-----------------------------------------------+

            15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
            +-----------------------------------------------+
            |0  0  1  1  1  1  1  1| 1| see indirect fields | INDIRECT
            +-----------------------------------------------+

CYCLES

            +------------------------------------------------+
            |    Cycle Timings for a Single Instruction      |
            |------------------------------------------------|
            | PI/DI | PI/DE | PE/DI | PE/DE  | PR/DI | PR/DE |
            |-------+-------+-------+--------+-------+-------|
      '20   |   1   |  2+d  |  1+p  | 2+d+p  |   -   |   -   |
            |-------+-------+-------+--------+-------+-------|
     'C25   |   1   |  2+d  |  1+p  | 2+d+p  |   1   |  2+d  |
            |------------------------------------------------|
            |    Cycle Timings for a Repeat Instruction      |
            |------------------------------------------------|
      '20   |   n   | 2n+nd |  n+p  | 2n+nd+p|   -   |   -   |
            |-------+-------+-------+--------+-------+-------|
     'C25   |   n   | 1+n+nd|  n+p  |1+n+nd+p|   n   |1+n+nd |
            +------------------------------------------------+



EXAMPLE     LTD   DAT126      (DP = 7, PM = 0)
            or
            LTD   *           If current auxiliary register contains 1022.

                BEFORE             AFTER

            dm1022 >62        dm1022 >62
            dm1023  >0        dm1023 >62
                 T  >3             T >62
                 P  >F             P  >F
             ACC X  >5         ACC 0 >14
                 C                 C