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SYNTAX      DIRECT   [<LABEL>] ADD <dma>[,shift]
            INDIRECT [<LABEL>] ADD {ind}[,<shift>[,<next ARP>]]

OPERANDS    0 . dma . 127; 0 . next ARP . 7;
            0 . shift . 15 (defaults to 0).

EXECUTION   (PC) + 1 . PC
            (ACC) + [(dma) * 2 ^ (shift)] . ACC
            If SXM = 1, then (dma) is sign extended.
            If SXM = 0, then (dma) is not sign extended.
            Affects OV; affected by OVM and SXM.
            Affects C on TMS320C25.

DESCRIPTION The contents of the addressed data memory location are
            left-shifted and added to the accumulator. During shifting,
            low-order bits are zero-filled. High-order bits are
            sign-extended if SXM = 1 and zero-filled if SXM = 0. The
            result is stored in the accumulator.

WORDS       1

ENCODING    15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
            +-----------------------------------------------+
            |0  0  0  0|   shift   | 0| data memory address | DIRECT
            +-----------------------------------------------+

            15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
            +-----------------------------------------------+
            |0  0  0  0|   shift   | 1| see indirect fields | INDIRECT
            +-----------------------------------------------+

CYCLES

            +------------------------------------------------+
            |    Cycle Timings for a Single Instruction      |
            |------------------------------------------------|
            | PI/DI | PI/DE | PE/DI | PE/DE  | PR/DI | PR/DE |
            |-------+-------+-------+--------+-------+-------|
      '20   |   1   |  2+d  |  1+p  | 2+d+p  |   -   |   -   |
            |-------+-------+-------+--------+-------+-------|
     'C25   |   1   |  2+d  |  1+p  | 2+d+p  |   1   |  2+d  |
            |------------------------------------------------|
            |    Cycle Timings for a Repeat Instruction      |
            |------------------------------------------------|
      '20   |   n   | 2n+nd |  n+p  | 2n+nd+p|   -   |   -   |
            |-------+-------+-------+--------+-------+-------|
     'C25   |   n   | 1+n+nd|  n+p  |1+n+nd+p|   n   | 1+n+nd|
            +------------------------------------------------+



EXAMPLE     ADD   DAT1,3      (DP=10)
            or
            ADD   *,3         If current auxiliary register contains 1281.

              BEFORE              AFTER

          dm1281  >8        dm1281   >8
           ACC X  >2         ACC 0  >42
               C                 C