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SYNTAX      [<LABEL>] IDLE

OPERANDS    None

EXECUTION   TMS32020:
                  (PC) + 1 . PC
            TMS320C25:
                  (PC) + 1 . PC
                  0 . interrupt mode (INTM) status bit
                  Affects INTM.

DESCRIPTION The IDLE instruction forces the program being executed to wait
            until an interrupt or a reset occurs. The PC is incremented
            only once, and the device remains in idle state until
            interrupted. On the TMS32020, the INTM bit must be set to zero
            in order for the maskable interrupts to be recognized. On the
            TMS320C25, INTM is automatically set to zero. Execution of the
            IDLE instruction causes the TMS320C25 to enter the powerdown
            mode.

WORDS       1

ENCODING    15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
            +-----------------------------------------------+
            |1  1  0  0  1  1  1  0  0  0  0  1  1  1  1  1 |
            +-----------------------------------------------+

CYCLES

            +------------------------------------------------+
            |    Cycle Timings for a Single Instruction      |
            |------------------------------------------------|
            | PI/DI | PI/DE | PE/DI | PE/DE  | PR/DI | PR/DE |
            |---------------+----------------+-------+-------|
      '20   |1 (min waits   | 1+p (min waits |   _   |   _   |
            |     for INT)  |    for INT)    |       |       |
            |------------------------------------------------|
            |     (Interrupt) destination on-chip ROM:       |
            |------------------------------------------------|
     'C25   |             3 (min wait for INT)               |
            |------------------------------------------------|
            |     (Interrupt) destination external memory    |
            |------------------------------------------------|
     'C25   |           3 + 2p (min wait for INT)            |
            |------------------------------------------------|
            |    Cycle Timings for a Repeat Instruction      |
            |------------------------------------------------|
      '20   |          not repeatable        |   -   |   -   |
            |------------------------------------------------|
     'C25   |                 not repeatable                 |
            +------------------------------------------------+



EXAMPLE     IDLE        The processor idles until a reset or an unmasked
                        interrupt occurs.