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SYNTAX      [<LABEL>] DINT

OPERANDS    None

EXECUTION   (PC) + 1 . PC
            1 . interrupt mode (INTM) status bit
            Affects INTM.

DESCRIPTION The interrupt mode (INTM) status bit is set to logic 1.
            Maskable interrupts are disabled immediately after the DINT
            instruction executes. Note that the LST instruction does not
            affect INTM.
                                     __
            The unmaskable interrupt RS is not disabled by this
            instruction, and the interrupt mask register (IMR) is
            unaffected. Interrupts are also disabled by a reset.


WORDS       1

ENCODING    15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
            +-----------------------------------------------+
            |1  1  0  0  1  1  1  0  0  0  0  0  0  0  0  1 |
            +-----------------------------------------------+

CYCLES

            +------------------------------------------------+
            |    Cycle Timings for a Single Instruction      |
            |------------------------------------------------|
            | PI/DI | PI/DE | PE/DI | PE/DE  | PR/DI | PR/DE |
            |-------+-------+-------+--------+-------+-------|
      '20   |   1   |   1   |  1+p  |  1+p   |   -   |   -   |
            |-------+-------+-------+--------+-------+-------|
     'C25   |   1   |   1   |  1+p  |  1+p   |   1   |   1   |
            |------------------------------------------------|
            |    Cycle Timings for a Repeat Instruction      |
            |------------------------------------------------|
      '20   |   n   |   n   |  n+p  |  n+p   |   -   |   -   |
            |-------+-------+-------+--------+-------+-------|
     'C25   |   n   |   n   |  n+p  |  n+p   |   n   |   n   |
            +------------------------------------------------+



EXAMPLE     DINT        Maskable interrupts are disabled, and INTM is set
                        to one.