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SYNTAX [<LABEL>] CMPR <constant>
OPERANDS 0 . CM . 3
EXECUTION (PC) + 1 . PC
Compare AR(ARP) to AR0, placing the result in TC bit of status
register ST1. Affects TC.
Not affected by SXM; does not affect SXM.
DESCRIPTION The CMPR instruction performs the following comparisons
dependent on the value of CM:
If CM = 00, test if AR(ARP) = AR0
If CM = 01, test if AR(ARP) < AR0
If CM = 10, test if AR(ARP) > AR0
If CM = 11, test if AR(ARP).NE.AR0
If the result of the test is true, a one is loaded into the
TC status bit; otherwise, TC is loaded with a zero. The
auxiliary registers are treated as unsigned integers in the
comparison.
WORDS 1
ENCODING 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+-----------------------------------------------+
|1 1 0 0 1 1 1 0 0 1 0 1 0 0| CM |
+-----------------------------------------------+
CYCLES
+------------------------------------------------+
| Cycle Timings for a Single Instruction |
|------------------------------------------------|
| PI/DI | PI/DE | PE/DI | PE/DE | PR/DI | PR/DE |
|-------+-------+-------+--------+-------+-------|
'20 | 1 | 1 | 1+p | 1+p | - | - |
|-------+-------+-------+--------+-------+-------|
'C25 | 1 | 1 | 1+p | 1+p | 1 | 1 |
|------------------------------------------------|
| Cycle Timings for a Repeat Instruction |
|------------------------------------------------|
'20 | n | n | n+p | n+p | - | - |
|-------+-------+-------+--------+-------+-------|
'C25 | n | n | n+p | n+p | n | n |
+------------------------------------------------+
EXAMPLE CMPR 2 (ARP = 4)
BEFORE AFTER
AR0 >FFFF AR0 >FFFF
AR4 >7FFF AR4 >7FFF
TC >1 TC >0