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        Port 3C0, 10  -  Attribute Mode Control

                1xxx xxxx  P5 and P4 Select
                             This bit selects the source for the P5 and P4
                             video bits that act as inputs to the video
                             DAC. When this bit is set to 0, P5 and P4
                             are the outputs of the internal Palette regis-
                             ters. When this bit is set to 1, P5 and P4 are
                             bits 1 and 0 og the Color Select Register
                             (3C0, 14).
                x1xx xxxx  PEL Width
                             When this bit is set to 1, the bideo data is
                             sampled so that eight bits are available to
                             select a color in the 256-color mode (mode
                             13h). This bit is set to 0 in all other modes).
                xx1x xxxx  PEL Panning Compatibility
                             When this bit is set to 1, a successful line-
                             compare in the CRT controller forces the output
                             of the PEL Panning register to  0 until a
                             vertical synchronization occurs, at which time
                             the output returns to its programmed value. This
                             bit allows a selected portion of a screen to be
                             panned.

                             When this bit is set to 0, line compate has no
                             effect on the output of the PEL Panning register.
                xxx1 xxxx  Reserved
                xxxx 1xxx  Enable blink/Select Background Intensity
                             When this bit is set to 0, the most-significant
                             bit of the attribute selects the background
                             intensity (which allows 16 colors for back-
                             ground). When set to 1, this bit enables
                             blinking.
                xxxx x1xx  Enable Line Graphics Character Code
                             When this bit is set to 0, the ninth dot will be
                             the same as the background. When set to 1, this
                             bit enables the special-linegraphics character
                             codes for the monochrome emulation mode. This
                             emulation forceds the ninth dot of a graphics
                             character to be identical to the eighth dot
                             of the character. The line-graphics character
                             codes for the monochrome emulation mode are
                             C0h through DFh.

                             For character fonts that do not utilize these
                             line-graphics character codes, bit 2 should be
                             set to 0 to prevent unwanted video information
                             from displaying on the CRT screen.

                             BIOS will set this bit, the correct dot clock,
                             and other registers when the 9-dot alphanumeric
                             mode is selected.
                xxxx xx1x  Mono Emulation
                             When this bit is set to 1, monochrome emulation
                             mode is selected. When this bit is set to 0,
                             color emulation mode is selected.
                xxxx xxx1  Graphics/Alphanumeric Mode
                             When set to 1, this bit selects the graphics
                             mode of operation.

See Also: 3C0, 14

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