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        Port 001  -  8237A-5 Channel 0 Word count

        All PCs except PCjr: Set to FFFFh=64K for memory refresh
        purposes. Write expect start count LSB, then MSB. Write
        automatically sets current count. Operation progresses
        until the current count reaches zero. Read returns start
        count LSB, then MSB. The base count cannot be obtained
        from this register.