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Overview         Overview of the Instruction Format

    Each entry in this list includes information on which flags in the
    8088's flag register are changed, and how they're changed.  Since
    there are 9 flags in the flags register, the flags display is very
    compact:


                        Flags: O D I T S Z A P C
                               0       * * ? * 0

           ?      Undefined after the operation.
           *      Changed to reflect the results of the instruction.
           0      Always cleared
           1      Always set

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    The timing charts show timings for the 8088.  Since the 80x8x
    processors execute instructions in fewer clock cycles than the 8088,
    these charts represent the worst case.

       Operands       This field gives the list of possible operands and
                      addressing modes for each instruction.

       Clocks         Number of clock cycles required to execute the
                      instruction on an 8088.  Effective Address
                      calculations (EA) take additional time, as outlined
                      in the EA table.

       Transfers      The number of memory references.  4 clock cycles are
                      required for each memory reference.

       Bytes          Number of bytes in the instruction.

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       Note:          The additional clock cycles required to reinitialize
                      the instruction que and fetch the next instruction
                      after a control transfer instruction (such as JMP or
                      CALL) is already included in the timing tables.  Two
                      clock times are listed for conditional transfer
                      instructions (such as JZ); the shortest time is for
                      the case when there is no transfer.